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A Tachibana project · Oric emulator

Phosphoric

ORIC-1 / Atmos — cycle-stepped

A cycle-stepped Oric emulator for Linux, macOS and Windows (and the browser), written in C11: a master clock advances the whole machine one cycle at a time, and the 6502 core is cycle-exact — 100 % correct bus sequence over the 2,440,000 cases of the 65x02 oracle.

It runs both natively (SDL2) and in the browser (WebAssembly), with no external dependency. Period peripherals, a built-in debugger, conversion and control tooling. EUPL 1.2-licensed.

Fact sheet

Status Available · v2.1.1 · 30 September 2026

Licence: EUPL-1.2 · A problem? Report it on the repository → · Contribute →

Features

What Phosphoric does

Cycle-stepped core

Micro-sequenced 6502 core (100 % against the SingleStepTests/65x02 oracle, NMOS dummy accesses included, interrupts sampled on the penultimate cycle), VIA 6522 clocked per cycle (N+2 period), ULA fetching one cell per cycle (raster splits), AY-3-8910 PSG at clock/8. What the claim covers — and what it does not — is spelled out component by component in docs/ACCURACY.md. Article: Phosphoric 2.0, the cycle-stepped machine →

Period peripherals

Microdisc WD1793 (real mechanical timing, Sedoric boot), Jasmin WD177x controller (TDOS boot, bad-sector injection), TAP cassette down to the signal level, ACIA 6551, the Digitelec DTL 2000 card (V23 Minitel), Mageco / ORICON MIDI, IJK joystick, Centronics printer and MCP-40 plotter.

LOCI & telematics

LOCI interface (FAT SD storage, USB HID), the PicoWiFiModemUSB WiFi modem, and the V23 / Digitelec modem to replay early telematics and bridge to the Minitel / Videotex heritage (the PAVI project).

Built-in debugger

Conditional and raster breakpoints, watchpoints, undo (rewind), a symbol-aware disassembler, an inline assembler, an ncurses TUI — and a remote GDB stub to debug the 6502 from gdb / VS Code.

Control & integration

--control mode (a text protocol for the OricForge IDE), a REST HTTP API, deterministic input record / replay (“TAS movie”), AVI video export, screenshots and Chromecast / Google Cast streaming.

Native, browser & free

An SDL2 build on Linux, Windows and macOS, or WebAssembly in the browser — byte-for-byte identical output. On-screen keyboard, CRT filter, .ost save states. Released under the EUPL 1.2 license.

See the full feature list → · Technical documentation → · Articles →

Media

Supported formats

.tap

Oric cassettes — fast load, or signal-level playback (--tape-signal) for protected loaders.

Supported

.dsk

Microdisc / Sedoric floppies, with realistic WD1793 mechanical timing.

Supported

.rom 16K

Machine ROMs bootable at $C000: BASIC 1.0 / 1.1, FOCAL, COMAL, FR / DE / ES variants…

Bootable

.ost

Save states with a CRC32 integrity check — F2 / F4 to save and reload on the fly.

Supported

Download & build

Get it and build it

Source code

The repository is public under the EUPL 1.2 license. Clone it, open an issue, send a patch.

Codeberg · Framagit · GitHub

Build natively

On Debian / Ubuntu, with SDL2:

sudo apt install build-essential libsdl2-dev
make SDL2=1
# then ./oric1-emu -r roms/basic11b.rom

Browser build

Compiled to WebAssembly (make wasm) and already online: it also powers the “Run online” button on the catalogue entries.

Open the emulator

Roadmap

Where development stands

Phosphoric is available (version 2.1.1, 30 September 2026) and remains under active development, backed by a suite of 1,208 automated tests in 60 suites (100 % green, Linux / Windows / macOS CI). Indicative status below — the repository is authoritative.

V2 — cycle-stepped machine

Master clock, cycle-exact 6502 core (65x02 oracle), VIA N+2, ULA one cell per cycle, PSG at clock/8, savestate as an exact resume point. Read the article →

Done

Core & peripherals

ORIC-1 / Atmos emulation, Microdisc/Sedoric, Jasmin, cassette, ACIA, DTL 2000, MIDI, LOCI (RP2040 firmware co-simulation).

Done

Native + WebAssembly

SDL2 builds (Linux / Windows / macOS) and browser, identical output; automatic release on tag.

Done

Hardware conformance

Line-by-line audit of the cores against manufacturer datasheets (WD1793, VIA 6522, PSG…). Still outside the model: FDC with fixed delays, VIA one-shot half-cycle.

In progress

ULA-NG → FPGA

Next-generation ULA (sprites, 80 columns, chunky 4bpp) as a software reference towards a Verilog / FPGA implementation.

In progress